发明名称 |
Apparatus and method for testing semiconductor integrated circuit |
摘要 |
There are provided a test apparatus and method for testing a semiconductor integrated circuit which enables improvements in the ease of operation and convenience of a BOST device and shortening of a test time. Numeric codes are assigned to tests. A test apparatus is equipped with memory and an analysis section. A test requirement table-in which hardware requirements required for conducting a test are set on a per-numeric-code basis-is stored in the memory. Test requirements corresponding to a numeric code are read from the memory, whereupon a test is performed. The analysis section analyzes a digital test output and sends the result of analysis to an external controller.
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申请公布号 |
US2002108080(A1) |
申请公布日期 |
2002.08.08 |
申请号 |
US20010927404 |
申请日期 |
2001.08.13 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
MORI HISAYA;YAMADA SHINJI;FUNAKURA TERUHIKO |
分类号 |
G01R31/316;G01R31/28;G01R31/3183;G01R31/3185;G01R31/319;H03M1/10;H03M1/66;(IPC1-7):G01R31/28;G06F11/00 |
主分类号 |
G01R31/316 |
代理机构 |
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代理人 |
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地址 |
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