发明名称 |
COMPUTER INSTRUCTION WITH INSTRUCTION FETCH CONTROL BITS |
摘要 |
A computer system with a processing unit and a memory. The processing unit is arranged to fetch memory lines from the memory and execute instructions from the memory lines. Each memory line is fetched as a whole and is capable of holding more than one instruction. An instruction comprises information that signals explicitly how the processing unit, when processing the instruction from a current memory line, should control how a part of processing is affected by crossing of a boundary to a subsequent memory line. The processing unit responds to the information by controlling said part as signaled by the information.
|
申请公布号 |
WO02061574(A1) |
申请公布日期 |
2002.08.08 |
申请号 |
WO2002IB00025 |
申请日期 |
2002.01.04 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V. |
发明人 |
LEIJTEN, JEROEN, A., J. |
分类号 |
G06F9/30;G06F9/32;G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/30 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|