| 摘要 |
<p>A memory system that includes a DRAM cell including an access transistor (3051) and a capacitor structure (3052) fabricated in a semiconductor substrate. The capacitor structure is fabricated by forming a cavity (3025) in a shallow trench isolation region (3022), thereby exposing a sidewall portion of the substrate below the upper surface of the substrate. The capacitor structure is formed at least partially in the cavity, below the upper surface of the substrate. The capacitor structure extends over the sidewall portion of the substrate, thereby increasing the surface area of the capacitor structure, while minimizing the layout area of the capacitor structure. The memory system may include positive and/or negative boosted voltage generators coupled to a word line driver. The positive boosted voltage is less than one diode voltage drop greater than VDD. The negative boosted voltage is less than VSS by less than the absolute value of one diode voltage drop.</p> |
