发明名称 Systems and methods for testing bumped wafers
摘要 A bumped wafer testing setup and associated method that eliminates the need for membrane probes. The test setup includes two plates coupled together, with the first plate including openings to accommodate solder bumps contained on the bumped wafer and the second plate including a test printed circuit board insert contained therein. The test printed circuit board insert includes solder bump contacts that contact the solder bumps within the openings.
申请公布号 US2002105351(A1) 申请公布日期 2002.08.08
申请号 US20010777260 申请日期 2001.02.05
申请人 SINGH INDERJIT 发明人 SINGH INDERJIT
分类号 G01R31/28;(IPC1-7):G01R31/26 主分类号 G01R31/28
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