发明名称 Wiring failure analysis method using simulation of electromigration
摘要 The present invention provides a wiring failure analysis method that overcomes difficulties due to shape changes of wires in LSI circuits and the like by effecting current and heat transfer analysis as well as analysis of diffusion of atoms in crystal grain structures. Particularly, the wiring failure analysis method is designed to apply void shape analysis on reservoir portions of aluminum alloy wires coupled with tungsten (W) plugs. First, a structure of a wire to be simulated is created to solve its background field (temperature and current densities) in accordance with the finite element method. Then, diffusion analysis is performed using electron wind power, which is proportional to the current densities, and diffusion coefficients regarding parameters of the crystal grain structure such as the crystal lattice, grain boundary, interface and surface, on which vacancy concentrations are calculated. As for the grain boundary and interface, virtual voids are generated in proximity to prescribed nodes at which the vacancy concentrations exceeds the critical value. Differences of chemical potentials are calculated before and after generation of the virtual voids with respect to the prescribed nodes respectively. Then, one of the prescribed nodes is detected as a node that causes smallest variation of the chemical potentials due to generation of the virtual void. Thus, a void is generated in proximity to the detected node, which is then subjected to void shape deformation process using electromigration.
申请公布号 US2002107675(A1) 申请公布日期 2002.08.08
申请号 US20010872533 申请日期 2001.06.01
申请人 NEC CORPORATION 发明人 SHINZAWA TSUTOMU
分类号 H01L21/66;G06F17/50;H01L21/3205;H01L23/52;H01L29/00;(IPC1-7):G06F17/10 主分类号 H01L21/66
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