发明名称 |
SRAM device |
摘要 |
An SRAM device of the present invention is an SRAM device, including: a plurality of bit line pairs that are arranged substantially parallel to one another and connected to different memory cells, respectively; selection means for selecting one bit line pair from among the plurality of bit line pairs; and potential holding means for holding a precharge potential of bit lines that are respectively on opposite sides of the one bit line pair with the one bit line pair being selected, wherein an interval between two adjacent bit line pairs is smaller than an interval between two bit lines of the same bit line pair.
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申请公布号 |
US2002105826(A1) |
申请公布日期 |
2002.08.08 |
申请号 |
US20020043134 |
申请日期 |
2002.01.14 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
YAMAUCHI HIROYUKI;YAMAGAMI YOSHINORI |
分类号 |
G11C11/41;G11C7/12;G11C11/412;G11C11/419;H01L21/8244;H01L27/11;(IPC1-7):G11C11/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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