| 摘要 |
PURPOSE:To make a transistor to have an amplifying function, and to obtain a more finely formable DRAM memory cell by a method wherein the DRAM memory cell is constructed of an N<+> type layer, a P<-> type layer, a P<+> type layer, an N<+> type layer, a word line WL, and a write electrode WG buried in a substrate SUB, etc. CONSTITUTION:At this memory cell, an N<+> type layer 10 acts as a drain, a P<-> type layer 12 as a channel part, an N<+> type layer 16 as a source, and a word line WL acts as a gate electrode to construct an MOS transistor Qa, moreover a P<+> type layer 14, an electrode WG and an insulating layer interposed between them construct a capacitor Ca, and electric charge stored to the said capacitor according to writing acts as back gate bias to vary the threshold value Vth of the transistor Qa. ON, OFF of the transistor Qa thereof cause a variation to bit line potential, the variation thereof is amplified according to a sense amplifier, and outputted through a data bus. Accordingly, a small quantity of memory charge is sufficient, moreover because the transistor and the capacitor are arranged being piled up, space can be reduced, and a large capacity DRAM can be realized. |
