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发明名称
Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic
摘要
申请公布号
GB0215181(D0)
申请公布日期
2002.08.07
申请号
GB20020015181
申请日期
2000.11.13
申请人
INTEL CORPORATION
发明人
分类号
G06F7/02;G06F7/48;G06F7/50;G06F7/509
主分类号
G06F7/02
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代理人
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