发明名称 Peak hold and calibration circuit
摘要 The present invention generally relates to a peak hold and calibration circuit, and more particularly, to a peak hold and calibration circuit for use in measuring the signals in a digital multi-meter implemented by using an integrated circuit (IC) and a capacitor, wherein said IC is connected to said capacitor; wherein said IC comprises an operational amplifier, and a switching circuit; wherein a first voltage is applied to one input terminal of said operational amplifier and the other input terminal of said operational amplifier is connected to the feedback network while the output terminal of said operational amplifier is connected to said switching circuit; wherein the output of said switching circuit is a second voltage and connected to said capacitor. The peak hold and calibration circuit for use in measuring the signals in a digital multi-meter of the present utilizes only a few components, thus it has lower fabricating cost, higher economic profit, low power-consumption and can solve the problems in that the diode which has short switching time, small parasitic capacitance, and small leakage current is hardly found.
申请公布号 US6429696(B1) 申请公布日期 2002.08.06
申请号 US20000500098 申请日期 2000.02.08
申请人 KAO CHENG-YUNG;CHEN WEN-TSAO;LEE YUNG-PIN 发明人 KAO CHENG-YUNG;CHEN WEN-TSAO;LEE YUNG-PIN
分类号 G01R15/12;G01R19/04;G01R35/00;(IPC1-7):G01R19/00;H03K5/153 主分类号 G01R15/12
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