发明名称 |
Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations |
摘要 |
<p>A device adapted to protect integrated circuits from reverse engineering comprising a part looking like a via connecting two metal layers, but in fact attached only to one metal layer and spaced from the other. Having such "trick" via would force a reverse engineer to think there is a connection where there is none. A method for fabricating such device.</p> |
申请公布号 |
AU2002234201(A1) |
申请公布日期 |
2002.08.06 |
申请号 |
AU20020234201 |
申请日期 |
2002.01.03 |
申请人 |
HRL LABORATORIES, LLC |
发明人 |
JAMES P. BAUKAS;LAP-WAI CHOW;WILLIAM M. JR. CLARK |
分类号 |
H01L23/522;H01L23/58;H01L27/02;(IPC1-7):H01L23/58 |
主分类号 |
H01L23/522 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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