| 摘要 |
The semiconductor wafer includes a substrate, a gate positioned on the substrate, a cap layer positioned on top of the gate, and a silicon oxide spacer positioned around both the gate and the cap layer. Firstly, a dielectric layer is formed on the semiconductor wafer to cover the gate. An etching back process is then performed to remove portions of both the dielectric layer and the silicon oxide spacer. Finally, a silicon nitride spacer is formed on the dielectric layer around the cap layer. The silicon nitride spacer is positioned on the surface of the dielectric layer and functions in reducing stress between the silicon nitride spacer and the substrate.
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