发明名称 Method and apparatus for interfacing a processor with a bus
摘要 A method and apparatus for interfacing a processor with a bus includes processing that begins by storing transactions initiated by the processor into a buffer. The processing then continues by selecting one of the transactions stored in the buffer and placing the selected transaction on the bus. The processing continues by monitoring progress of fulfillment of each transaction in the buffer and flagging a transaction when it has been successfully completed. The processing also includes processing at least two related transactions prior to selecting one of the transactions from the buffer where, if transactions can be processed locally, they do not need to be transported on the bus. In addition, the processing includes monitoring the bus for related transactions initiated by another processor such that these transactions can be more efficiently processed. The related transaction on the bus would correspond to a transaction queued in the buffer.
申请公布号 US6430646(B1) 申请公布日期 2002.08.06
申请号 US19990377004 申请日期 1999.08.18
申请人 ATI INTERNATIONAL SRL 发明人 THUSOO SHALESH;PATKAR NITEEN;VAN DYKE KORBIN;PURCELL STEPHEN C.
分类号 G06F13/42;(IPC1-7):G06F13/00 主分类号 G06F13/42
代理机构 代理人
主权项
地址