| 摘要 |
<p>PROBLEM TO BE SOLVED: To set an erasure pulse applying time so that dispersion of threshold voltage is made small without deteriorating erasure speed. SOLUTION: Voltage Vrpin to which voltage Vpp (12 V) for an external terminal 26 is dropped by a resistance element 28 of 3500Ωis supplied to a regulator circuit 27 as a voltage value of an erasure pulse applied to a common source line 21, and voltage Vpll stabilized to 5 V is obtained. A level detecting circuit 22 starts from 5 V at the time of start of erasing, and finish of applying an erasure pulse of a first time is discriminated by a compared result of input voltage Vrpin for the regulator circuit 27 having large voltage amplitude of approximately 6 V or more and reference voltage Vref of 11 V. Thereby, dispersion of threshold voltage of a memory cell after finish of applying an erasure pulse of the first time can be reduced. Therefore, a resistance element for enlarging variation of source line voltage is not required, erasure speed never be deteriorated.</p> |
