发明名称 RAM with capability for rapid clearing of data from memory by simultaneously selecting all row lines
摘要 A Random Access Memory having a fast Clear operation includes a cell array (10) which has a plurality of memory cells arranged in rows and columns. Each of the rows is selected by word lines (12) and the data is output on column lines (14). Each of the word lines (12) is selected by a row decode circuit (20) or a Clear signal through OR gates (22). The Clear signal selects all of the word lines (12) such that each row in the cell array (10) is selected. The bit line associated with each column are pulled to ground through an N-channel transistor (36) and a bit line bar pulled high through a P-channel transistor (38). In addition, the VCC supply to the array (10) is decoupled from the memory cells by a P-channel transistor (40).
申请公布号 US4890263(A) 申请公布日期 1989.12.26
申请号 US19880200649 申请日期 1988.05.31
申请人 DALLAS SEMICONDUCTOR CORPORATION 发明人 LITTLE, WENDELL L.
分类号 G11C11/419 主分类号 G11C11/419
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