| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a data processor, capable of running a program formed of instructions of a plurality of different instruction system at high speed, and to provide a memory interface device for the running. SOLUTION: The memory interface part 503 of a data processor 510 comprises an instruction fetch circuit for receiving address value for accessing from a processor core 100 to an external memory space and fetching an instruction from an external memory, a converter for converting a non-native command for a processor core 100 received from the external memory into a native command, and a selection circuit for providing either of an instruction read from the external memory space and an instruction as the result of conversion of the instruction read from the external memory space by a converter selectively, depending on whether the address value at the time of access of the processor core 100 to the external memory space is present or not in a specified area.</p> |
