发明名称 Semiconductor integrated circuit and method for testing the same
摘要 In measuring the resistance value of an output buffer, a supply voltage is supplied to a first P-channel transistor in its source through an ammeter provided within an IC tester, a ground potential is supplied from the IC tester to a first N-channel transistor in its source, and a voltmeter provided within the IC tester is connected to a first external output terminal. A test control signal is then brought to a high level. Further, a test signal of a plurality of bits, which brings only a first test control signal to a high level while brining the remaining 2nd to nth test control signals to a low level, is input into a decoder. As a result, the first P-channel transistor and the first N-channel transistor are brought to an ON state, while 2nd to nth external output terminals are brought to a high-impedance state. By virtue of the above construction, a semiconductor integrated circuit and a method for testing the same can be realized which can highly reliably measure the resistance value of a high-drive output buffer without undergoing the influence of contact resistance caused between the semiconductor integrated circuit and the IC tester and preferably can suppress the deterioration of the circuit.
申请公布号 US2002101249(A1) 申请公布日期 2002.08.01
申请号 US20010001796 申请日期 2001.12.05
申请人 NEC CORPORATION 发明人 SHIMODA HIROTAKA
分类号 G01R31/28;G01R31/26;G01R31/30;G01R31/3185;H03K19/00;H03K19/0175;(IPC1-7):G01R31/08 主分类号 G01R31/28
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