| 摘要 |
<p>A phase-locked loop has associated with it a first register set (21) for holding data defining a mode of operation of the phase-locked loop; and a second register set (22) for holding data defining a mode of operation of the phase-locked loop. Switches (27 to 30) are provided for coupling one of the first and second register sets to receive data defining a new mode of operation while the other of the first and second register sets is connected to the phase-locked loop to cause the same to operate in the mode defined by the data in the other register set. The switches are reconfigurable to change the coupling so that the other register set is coupled to receive data defining a further new mode of operation while the one register set is connected to the phase-locked loop to operate in the new mode of operation. The two register sets allow the phase-locked loop to switch quickly between different operating frequencies.</p> |
