发明名称 Digital blanking circuit
摘要 A digital blanking circuit allows a first digital input signal transition to be passed on to a following stage, but prohibits the passing of subsequent transitions for a predetermined blanking interval. One embodiment of the present invention employs rising edge and falling edge latches, the inputs of which receive the digital input signal and the outputs of which are connected to a two-to-one multiplexer. The mux output is connected to a blanking interval circuit, which is triggered to begin timing a blanking interval by a multiplexer output transition. The blanking interval circuit provides outputs which control the latches and selects the latch output to be transferred to the multiplexer output such that the multiplexer output is prevented from transitioning during a blanking interval. An "adaptive" blanking circuit is also described in which the blanking interval is terminated when the transition which triggered the start of the blanking interval propagates through an entire signal path, such that the blanking interval is automatically adjusted to be the same as the signal path delay.
申请公布号 US2002101945(A1) 申请公布日期 2002.08.01
申请号 US20010770543 申请日期 2001.01.26
申请人 ANALOG DEVICES, INC. 发明人 AUDY JONATHAN M.;REDL RICHARD;REIZIK GABOR;ERISMAN BRIAN P.
分类号 H03G3/34;(IPC1-7):H04B1/10 主分类号 H03G3/34
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