| 摘要 |
PROBLEM TO BE SOLVED: To obtain a memory device in which current supply capability of a sense amplifier can be controlled to be optimum in response to an operation mode. SOLUTION: The memory device has a plurality of bit lines BL0; BLB0, BL1; BLB1, etc., and a plurality of word lines WL 0, WL 1, etc., intersecting each other, a plurality of memory cells MC00, MC01, etc., MC10, MC11, etc., connected to the plurality of bit lines and the plurality of word lines at intersection part of the plurality of bit lines and the plurality of word lines and arranges in a matrix state, and sense amplifiers connected to each bit line. A plurality of sense amplifiers SA000, SA001, SA002, SA010, SA011, SA012, etc., are connected to each bit line, the number of sense amplifiers to be activated out of a plurality of sense amplifiers connected to each bit line is controlled in accordance with an operation mode.
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