| 摘要 |
PROBLEM TO BE SOLVED: To obtain a memory device in which current consumption for charging and discharging for a plurality of pairs of first and second bit lines at the time of sensing operation can be reduced. SOLUTION: First and second bit lines of each pair are divided into parts BL-m, BLB-m to which respective memory cells MC (0), MC (1),..., MC(2n+1) are connected and parts BL-SA, BLB-SA to which respective amplifiers SA are connected and gate means Q1, Q2 connecting and separating respectively two parts of bit lines of each pair are provided. The gate means Q1, Q2 are controlled so that the gate means Q1 (or gate means Q2) is turned on and the gate means Q2 (or gate means Q1) is turned off during sensing operation when a bit line to which an accessed memory cell out of a plurality of memory cells is connected is a first bit line BL (or a second bit line BLB).
|
