| 摘要 |
PROBLEM TO BE SOLVED: To solve a problem that the bit error rate deteriorates due to delay time difference between an in-phase side data conversion signal Ich and a quadrature side data conversion signal Qch. SOLUTION: The quadrature modulator comprises a circuit 6 for demodulating an in-phase side data conversion signal Ich and a quadrature side data conversion signal Qch, respectively, from a part of a QPSK modulation signal, a circuit 7 for detecting the delay time difference between the in-phase side data conversion signal Ich and the quadrature side data conversion signal Qch from the demodulation circuit 6, and a variable delay circuit 8 for imparting the quadrature side data conversion signal Qch being inputted to a multiplier circuit 4 with a delay time such that the delay time difference is minimized. |
