Semiconductor circuit

摘要

A level shifter (1) that may provide a relatively high-speed operation in a level shifting mode and a non-level shifting mode has been disclosed. Level shifter (1) may include a transistor (P101) providing a controllable current path between a voltage terminal (3) and an output signal (TOUT) based on the logic level of an input signal (IN). Series connected transistors (P104 and P105) may provide a controllable current path between voltage terminal (3) and output signal (TOUT) based on the logic level of an input signal (IN). Transistor (P105) may be enabled in a Vcc mode and may be disabled in a Vpp mode. In this way, an equivalent transistor width (WT) may be adjusted in accordance with a mode of operation and a transition time of output signal (TOUT) may be improved.