| 摘要 |
An ESD guard structure includes a self-aligned lateral p+/n+ diode serving as the trigger diode. This lateral trigger diode is largely independent of alignment precisions. The n+ and p+ regions are implanted on opposite sides of a gate electrode. The edges of the resist masks of the respective process diffusions are placed onto this gate electrode such that they always rest on the gate electrode, within the limits of the alignment capabilities. This way, the spacing between the n+ region and the p+ region is defined solely by the length or width of the gate electrode, which can be closely controlled. This technique is limited only by the requirement that the minimum gate electrode length must be no less than twice the maximum alignment precision.
|
