发明名称 |
Method for producing an integrated circuit having at least one metalicized surface |
摘要 |
In order to fabricate a metallization plane with lines and contacts, four dielectric layers are applied to a substrate. Firstly, contact holes are etched through the top two dielectric layers into the underlying dielectric layer, the remaining thickness of the latter layer being essentially equal to the thickness of the top layer. Line trenches are subsequently etched selectively with respect to the first dielectric layer and the third dielectric layer, whose surfaces are uncovered essentially simultaneously. After the first dielectric layer and the third dielectric layer have been patterned, contacts and lines are produced in the contact holes and line trenches.
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申请公布号 |
US2002098679(A1) |
申请公布日期 |
2002.07.25 |
申请号 |
US20010005293 |
申请日期 |
2001.12.05 |
申请人 |
SCHWARZL SIEGFRIED;ENGELHARDT MANFRED;KREUPL FRANZ |
发明人 |
SCHWARZL SIEGFRIED;ENGELHARDT MANFRED;KREUPL FRANZ |
分类号 |
H01L21/28;H01L21/311;H01L21/768;H01L23/522;(IPC1-7):H01L21/476;H01L21/44;H01L21/31;H01L21/469 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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