发明名称 NEAR-ORTHOGONAL DUAL-MAC INSTRUCTION SET ARCHITECTURE WITH MINIMAL ENCODING BITS
摘要 A near-orthogonal dual-MAC instruction set is provided which implements virtually the entire functionality of the orthogonal instruction set of 272 commands using only 65 commands. The reduced instruction set is achieved by eliminating instructions based on symmetry with respect to the result of the commands and by imposing simple restrictions related to items such as the order of data presentation by the programmer. Specific selections of commands are also determined by the double word aligned memory architecture which is associated with the dual-MAC architecture. The reduced instruction set architecture preserves the functionality and inherent parallelism of the command set and requires fewer command bits to implement than the full orthogonal set.
申请公布号 US2002099923(A1) 申请公布日期 2002.07.25
申请号 US19980132882 申请日期 1998.08.12
申请人 ALIDINA MAZHAR M.;SIMANAPALLI SIRVAND;TATE LARRY R.;THIERBACH MARK E. 发明人 ALIDINA MAZHAR M.;SIMANAPALLI SIRVAND;TATE LARRY R.;THIERBACH MARK E.
分类号 G06F7/544;G06F9/30;G06F9/38;(IPC1-7):G06F15/00 主分类号 G06F7/544
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