发明名称 FIELD EFFECT TRANSISTOR WITH REDUED GATE DELAY AND METHOD OF FABRICATING THE SAME
摘要 <p>A transistor formed on a substrate 201 comprises a gate electrode 207 having a lateral extension at the foot of the gate electrode that is less than the average lateral extension of the gate electrode 207. The increased cross-section of the gate electrode 207 compared to the rectangular cross-sectional shape of a prior art device provides for a significantly reduced gate resistance while the effective gate length, i.e., the lateral extension of the gate electrode at its foot, may be scaled down to a size of 100 nm and beyond. Moreover, a method for forming the field effect transistor described above is disclosed.</p>
申请公布号 WO2002058158(A2) 申请公布日期 2002.07.25
申请号 US2001049970 申请日期 2001.10.23
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