发明名称 System and method for the handling of system management interrupts in a multiprocessor computer system
摘要 A method for handling system management interrupts in multiprocessors systems is provided. After the processors of the system enter system management mode, one of the processors of the system is designated to handle the system management interrupt. The processor designated to handle the system management interrupt scans a memory location that includes a memory space associated with the saved contents of the processor registers of each processor. After locating a SMI signature in one of the memory spaces associated with the respective processors of the system, the SMI handler of the processor designated to handle the system management interrupts, retrieves any necessary parameters for the system management interrupt from the memory space associated with the SMI signature, thereby allowing a processor to cause the issuance a SMI, to pass a set of parameters for the software SMI, and to permit a second processor to receive the parameters and handle the software SMI.
申请公布号 US2002099893(A1) 申请公布日期 2002.07.25
申请号 US20010768665 申请日期 2001.01.24
申请人 NGUYEN TUYET-HUONG THI;MATHEW GEORGE;CHAN WAI-MING RICHARD;KHATRI MUKUND P. 发明人 NGUYEN TUYET-HUONG THI;MATHEW GEORGE;CHAN WAI-MING RICHARD;KHATRI MUKUND P.
分类号 G06F13/24;(IPC1-7):G06F13/24 主分类号 G06F13/24
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