| 摘要 |
PURPOSE: A redundant decoder circuit is provided, which stores an address information of a defective cell of a main memory cell array using an electrically erasable and programmable device(EEPROM). CONSTITUTION: According to the redundant decoder circuit outputting an information signal indicating whether an address inputted from the external is an address of a defective cell of a main memory cell array, an array of a plurality of electrically erasable and programmable memory cells stores a pair of complementary address data corresponding to a defective cell of the main memory cell array, and is connected to a word line and to a corresponding bit line among a plurality of bit lines. A word line driver drives the word line by outputting a voltage corresponding to read, erase and program mode. A precharge circuit precharges the first node, and an output circuit outputs the information signal by latching a voltage level of the first node. And comparison units(122) correspond to a pair of complementary data bits among the pair of complementary address data, and are connected to the first node in parallel.
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