发明名称 PROCESS FOR FORMING A METALLIC INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS
摘要 <p>A multi-level interconnect structure (200) and process of formation, in which a via dielectric (214) is disposed between upper and lower horizontal metallic conductors (217, 211). A vertical metallic conductor (222) is disposed within the via dielectric layer and has end portions contacting the horizontal metallic conductors such that the size of the vertical contact interfaces between the conductors is greater than the horizontal contact interfaces. <IMAGE></p>
申请公布号 EP0707742(B1) 申请公布日期 2002.07.24
申请号 EP19950917652 申请日期 1995.04.24
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 CHUNG, HENRY, WEI-MING
分类号 H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/768 主分类号 H01L21/768
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