发明名称 Information processing system, bus arbiter, and bus controlling method
摘要 The present invention provides a means for preventing execution of a transaction such as main storage access from obstruction by bus competition with low-speed IO access and improving the bus occupation efficiency.The present invention includes a first bus, a second bus, a plurality of modules connected to both buses, a bus conversion means for performing protocol conversion of information between both buses, a bus arbiter for arbitrating a bus occupation right request of a bus master, and a storage means for storing access data up to a predetermined amount when the access destination is a predetermined module. Each bus master outputs access destination information and when the bus arbiter judges that one of the bus masters issues a bus occupation right request when it performs an access operation, the bus arbiter refers to the access destination information and the data storage status of the storage means and decides whether or not to give a bus occupation right to the bus master.
申请公布号 US6425037(B1) 申请公布日期 2002.07.23
申请号 US19990407064 申请日期 1999.09.28
申请人 HITACHI, LTD. 发明人 KONDO NOBUKAZU;OKAZAWA KOICHI;SEKI YUKIHIRO;HATTORI RYUICHI;UMEMURA MASAYA;ADACHI SHIGEMI;NAKAI KOUICHI;MORIYAMA TAKASHI
分类号 G06F13/36;G06F13/362;G06F13/364;(IPC1-7):G06F13/00 主分类号 G06F13/36
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