发明名称 High performance packaging for microprocessors and DRAM chips which minimizes timing skews
摘要 A method and apparatus for packaging microprocessors and memory devices on a single silicon substrate is described. Microprocessors and memory devices are placed on both sides of the silicon substrate. Through holes are formed in the substrate to connect the microprocessor and memory devices together. By packaging the microprocessor and memory element this way, the propagation length between the memory and the microprocessors is shortened, and timing skews are minimized, and data transmission speed is increased. In addition, additional active and passive circuits and/or components can also be fabricated in one or both sides of the silicon substrate.
申请公布号 US6424034(B1) 申请公布日期 2002.07.23
申请号 US19980144197 申请日期 1998.08.31
申请人 MICRON TECHNOLOGY, INC. 发明人 AHN KIE Y.;FORBES LEONARD;FARRAR PAUL
分类号 H01L25/18;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 主分类号 H01L25/18
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