发明名称 Accessing exception handlers without translating the address
摘要 A vector point of an exception handler related to TLB miss exception events is obtained by reading a vector base address of a register VBR one time, and by adding a vector offset (H'400) thereto. A vector point of an exception handler related to exception events other than the TLB miss exception events is obtained by adding a vector offset to a value (vector base address) of the register VBR, and an exception code which is an address offset obtained by reading a value of the register EXPEVT or INTEVT one time is added to the vector point that is obtained. Thus, the processing is branched to a required exception handler to execute the exception event processing related to exception events other than the TLB miss exception events.
申请公布号 US6425039(B2) 申请公布日期 2002.07.23
申请号 US19990450894 申请日期 1999.11.29
申请人 HITACHI, LTD. 发明人 YOSHIOKA SHINICHI;KAWASAKI IKUYA;MATSUI SHIGEZUMI;NARITA SUSUMU
分类号 G06F11/00;G06F9/30;G06F9/32;G06F9/48;G06F12/10;(IPC1-7):G06F13/32 主分类号 G06F11/00
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