| 摘要 |
A bus system for the serial transmission of digital data with a multiplicity of individual addressable bus transceivers (BT), which are connected by an only two-wire common bus, via which both synchronising signals and also digital data and energy are exchanged between the BTs. As the value of a bit, The result of an elementary logical operation (AND or OR) on the values of all simultaneously transmitting BTs with the same address is transmitted to all the receiving BTs with the same address simultaneously. Each BT includes its own time control and synchronising circuit with a time base, a bit counter, a byte counter and a comparator. With an identity between the imprinted address and that appearing on the bus a byte of digital data is transmitted serially via an I/O port The bus system can be put into operation and operated without the use of software, whereby polarisation errors in installation are excluded.
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