| 摘要 |
A match detection circuit detecting match of data outputted to a plurality of data terminals is provided on an input/output circuit part. In a test, the same result is written in two latches, and alternately read in response to a clock signal. From a terminal outputting data at a double data rate in general, therefore, a test result can be outputted at a lower data rate. Observation is enabled with a tester having low performance, for reducing the cost for the test.
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