发明名称 |
Borderless bitline and wordline DRAM structure |
摘要 |
It is a feature of the present invention that a subminimum dimension wordline links approximately minimum dimensional individual gate segments with the bitline contact being borderless to the wordline.It is still a further object of the present invention to provide a transistor with an individual segment gate conductor and a subminimum dimension gate connector with the bitline contact being borderless to the wordline.A semiconductor structure and method of making same comprising a DRAM cell which has a transistor which includes a gate. The gate comprises an individual segment of gate conductor such as polysilicon on a thin dielectric material. The transistor further comprises a single crystal semiconductor substrate having a source/drain region. An active conductive wordline is deposited on top of and electrically contacting the segment gate conductor with the wordline being a conductive material. Insulating material completely surrounds the active wordline except where the active wordline contacts the segment gate conductor. A bitline contact contacting the insulating material surrounds the wordline contact in the source/drain region to thereby make the bitline contact borderless to the wordline.
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申请公布号 |
US6420748(B1) |
申请公布日期 |
2002.07.16 |
申请号 |
US20000657968 |
申请日期 |
2000.09.08 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HAKEY MARK C.;HORAK DAVID V.;MA WILLIAM H.;NOBLE, JR. WENDELL P. |
分类号 |
H01L21/60;H01L21/8242;H01L27/108;(IPC1-7):H01L27/108 |
主分类号 |
H01L21/60 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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