发明名称 Three-dimensional memory array and method of fabrication
摘要 A multi-level memory array is described employing rail-stacks. The rail-stacks include a conductor and semiconductor layers. The rail-stacks are generally the diode is located in one rail-stack and the other half in the other rail-stack.
申请公布号 US6420215(B1) 申请公布日期 2002.07.16
申请号 US20010814727 申请日期 2001.03.21
申请人 MATRIX SEMICONDUCTOR, INC. 发明人 KNALL N. JOHAN;JOHNSON MARK
分类号 G11C16/04;H01L21/77;H01L21/8246;H01L21/84;H01L27/06;H01L27/102;H01L27/115;(IPC1-7):H01L21/82;H01L21/44 主分类号 G11C16/04
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