发明名称 |
MANUFACTURING METHOD OF TRANSISTOR FOR TEST PATTERN |
摘要 |
PURPOSE: A method for manufacturing transistors for a test pattern is provided to simplify manufacturing processes and to reduce resistance between a channel and a contact by forming a polysilicon layer under pads. CONSTITUTION: A gate oxide(45) and a gate electrode(47) having a hard mask(49) are sequentially formed on a semiconductor substrate(41). An LDD(Lightly Doped Drain) region(51) is formed in the semiconductor substrate. An insulating spacer(53) is formed at both sidewalls of the gate electrode(47). A conductive layer(55) is formed at a predetermined region as a body pad, a source pad and a drain pad. The conductive layer are etched-back by using the hard mask(49) as an etch stopper. An interlayer dielectric having contact holes for the pads is formed on the resultant structure.
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申请公布号 |
KR20020058279(A) |
申请公布日期 |
2002.07.12 |
申请号 |
KR20000086341 |
申请日期 |
2000.12.29 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHA, SEON YONG;LEE, GI MIN |
分类号 |
H01L29/78;(IPC1-7):H01L29/78 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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