发明名称 DATA PROCESSOR USING DUAL BUS STRUCTURE
摘要 PURPOSE: A data processor using dual bus structure is provided to improve the performance of a system by adding a dual port RAM for temporarily storing data and by increasing the data loading and processing frequency of a CPU having a high duty factor. CONSTITUTION: The processor includes the CPU(100) in charge of the general control and processing of a control circuit, a memory(200) for storing the data processed by the CPU, a peripheral device(400) having the data processed by the CPU, a transmission controller(300) for loading the data of the peripheral device and storing the data in a dual port RAM, the dual port RAM(500) for storing the data of the peripheral device, the first bus(600) in charge of the data movement among the central processing unit, the memory, the dual port RAM, and the peripheral device, and the second bus(700) in charge of the data movement of the transmission controller and the peripheral device. The transmission controller includes a direct memory access controller. The dual port RAM consists of many blocks including indexes.
申请公布号 KR20020058194(A) 申请公布日期 2002.07.12
申请号 KR20000086231 申请日期 2000.12.29
申请人 LG ELECTRONICS INC. 发明人 YOO, DEUK HYEONG
分类号 G06F13/40;(IPC1-7):G06F13/40 主分类号 G06F13/40
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