| 摘要 |
PROBLEM TO BE SOLVED: To transmit serially a sending data of more than 2 bites constitution efficiently without increasing the number of transmitting lines. SOLUTION: In this system, a clock data generating circuit 35 outputs a bit-sequence of '1, 0, 0, 0, 0, 0, 0, 0' as a clock information when a lower rank bite is designated by a byte position signal, and outputs a bit-sequence of '1, 1, 0, 0, 0, 0, 0, 0' as a clock information when a higher rank bite is designated by a byte position signal. Thus it enables to restore the bytes constitution sent serially with transmitting clock accurately from the clock information at the receiving-side by transmitting serially two kinds of bit-sequence having the same period and the different duty ratio selectively by adjusting to the byte position of a serial data s38 transmitted serially through a shift register 33. |
