| 摘要 |
PURPOSE: A circuit for arraying data frames in a SONET(Synchronous Optical NETwork) is provided to array the frame start locations of N numbers of data by executing parallel processing for STS-1 data and clocks, detecting frame start locations from the parallel-processed signals, creating a common portion with their respective frame pulses, makes a pulse, which is repeated every required bits, using the common portion, and processing parallel data using the pulse. CONSTITUTION: A circuit for arraying data frames in a SONET consists of parallel processing parts(20), a reference setup part(30), and a data array part(40). The parallel processing parts(20) read STS-1 data and clocks, inputted from various devices(10), and output 8-bit parallel data and frame signals(FP_WIN #1-#N) using a frame start bit and a parallel frame bit. The reference setup part(30) detects high-level signals(FP_DETECT #1-#4) based on the frame signals(FP_WIN #1-#N) inputted from the parallel processing parts(20), creates a high-level common signal(ADJUST_BIT), makes a signal(ADJUST_WINS), which is repeated every 8 bits, through the high-level common signal(ADJUST_BIT), and outputs it together with the parallel data. The data array part(40) outputs the parallel data, synchronized with the signal(ADJUST_WINS) and reference clock of the reference setup part(30). |
