| 摘要 |
PURPOSE: To provide a semiconductor memory in which writing of a test pattern by which short circuit between storage nodes of a memory cell can be detected can be performed quickly. CONSTITUTION: A VBL generating circuit 130 normally outputting an equalizing potential outputs potential corresponding to written data in a test mode, and this potential is supplied en bloc to a bit line by an equalizing circuit. In the test mode, a row decoder fixes pre-decoding signals RX0-RX3 to an activated state, and word lines selected for writing a test pattern in a short time are activated en bloc by controlling pre-decoding signals X0-X3 in accordance with the test signal in the test mode.
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