| 摘要 |
PROBLEM TO BE SOLVED: To provide a data arbitration circuit which has a relatively small number of circuit elements and has small circuit scale. SOLUTION: The storage area of an SDRAM memory Fm is given border addresses and virtually divided into FIFO areas Mu1 to MuN, where data are written or read by supplying write addresses or read addresses to those FIFO areas Mu1 to MuN through an input/output interface IOf; and further, input port addresses or output port addresses are supplied to bring data inputted to and outputted from input ports Ip1 to Ip3 or output ports Op1 to Op3 through the input/output interface IOf under the arbitration control of an arbiter (data arbitration circuit) Arbt.
|
