发明名称 |
Method of fabricating a stacked poly-poly and MOS capacitor using a SiGe integration scheme |
摘要 |
A stacked Poly-Poly/MOS capacitor useful as a component in a BiCMOS device comprising a semiconductor substrate having a region of a first conductivity-type formed in a surface thereof; a gate oxide formed on said semiconductor substrate overlaying said region of first conductivity-type; a first polysilicon layer formed on at least said gate oxide layer, said first polysilicon layer being doped with an N or P-type dopant; a dielectric layer formed on said first polysilicon layer; and a second polysilicon layer formed on said dielectric layer, said second polysilicon layer being doped with the same or different dopant as the first polysilicon layer.
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申请公布号 |
US2002089008(A1) |
申请公布日期 |
2002.07.11 |
申请号 |
US20000551168 |
申请日期 |
2000.04.17 |
申请人 |
COOLBAUGH DOUGLAS D.;DUNN JAMES STUART;ONGE STEPHEN ARTHUR ST. |
发明人 |
COOLBAUGH DOUGLAS D.;DUNN JAMES STUART;ONGE STEPHEN ARTHUR ST. |
分类号 |
H01L27/04;H01L21/02;H01L21/822;H01L21/8249;H01L27/06;H01L29/94;(IPC1-7):H01L27/108 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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