发明名称 |
Method and resulting device for manufacturing for double gated transistors |
摘要 |
A process for forming an integrated circuit device structure. The process includes forming a first gate layer on a thickness of material on a donor substrate. The donor substrate has a cleave region underlying the gate layer. The process also includes joining the donor substrate to a handle substrate where the gate layer face the handle substrate; and separating the thickness of material at the cleave region from the donor substrate to define a handle substrate comprising the gate layer and an overlying thickness of material. The process forms a plurality of second gate structures on the thickness of material, where at least one of the first gate structures facing one of the second gate structures forming a channel region therebetween.
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申请公布号 |
US2002090758(A1) |
申请公布日期 |
2002.07.11 |
申请号 |
US20010956486 |
申请日期 |
2001.09.18 |
申请人 |
SILICON GENESIS CORPORATION |
发明人 |
HENLEY FRANCOIS J.;CHEUNG NATHAN |
分类号 |
H01L21/265;H01L21/336;H01L21/762;H01L21/84;H01L29/78;H01L29/786;(IPC1-7):H01L21/44 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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