发明名称 Verfahren und Schaltungsanordnung zum Erkennen von Synchronisationsmustern in einem Empfänger
摘要 To provide a method and a circuit arrangement (100) for detecting synchronization patterns in a receiver, particularly in a UHF receiver or a VHF receiver, by which the average current consumption in a system with a receiver, particularly a UHF receiver or a VHF receiver, and with a subsequently arranged controller unit (200) can be clearly reduced, - at least a shift register (30) whose input can be impressed with an incoming signal and which is provided for picking up or taking over the signal state pattern particularly determined by the slopes; - at least a slope detector (40) whose input can also be impressed with the incoming signal; - at least a clock recovery unit (50) to be synchronized with the signal and preceded by the slope detector (40), the output of said clock recovery unit being connected to the clock input (30c) of the shift register (30); and - at least a decision unit (60) preceded by the shift register (30) for comparing, particularly continuously comparing the signal state pattern picked up by the shift register (30) and possibly also completely inverted with a predetermined state pattern stored in at least a pattern memory (70) assigned to the decision unit (60) are provided.
申请公布号 DE10100570(A1) 申请公布日期 2002.07.11
申请号 DE2001100570 申请日期 2001.01.09
申请人 PHILIPS CORPORATE INTELLECTUAL PROPERTY GMBH 发明人 TOBERGTE, WOLFGANG;ZEEUW, STEPHAN DE
分类号 H04L7/08;H04B1/16;H04L7/04 主分类号 H04L7/08
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