| 摘要 |
A method and apparatus for efficient cache mapping of compressed Very Long Instruction Word (VLIW) instructions. In the present invention, efficient cache mapping of compressed variable length cache lines is performed by decompressing a sequence of compressed instructions to obtain decompressed cache lines and storing the decompressed cache lines in the same sequence in the cache memory. The present invention decouples the program counter based cache mapping from the memory address. In this way, a fixed increment cache pointer and variable size compressed cache line can be achieved, and, in doing so, decompressed cache lines fit nicely within the cache, in sequential order, while variable length compressed cache lines can be directly accessed without the use of a translation table.
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