发明名称 Method for selectively etching silicon and/or metal silicides
摘要 A metal silicide (e.g., WSix) layer an integrated circuit is etched in a Cl2/O2 environment having an O2 concentration of greater than or equal to 25% by volume. This environment may be provided at a pressure of-approximately 2-40 mili-Torr, in a reactor with a source power of approximately 200-2000 Watts and a bias power of approximately 30-400 Watts for approximately 30 seconds. In one particular example, the Cl2/O2 environment includes approximately 45 sccm Cl2 and 30 sccm O2. The metal silicide layer is fully etched without etching an underlying poly-silicon layer. The metal silicide layer may be a portion of a gate structure.
申请公布号 US2002090817(A1) 申请公布日期 2002.07.11
申请号 US20020072082 申请日期 2002.02.07
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 WANG TINGHAO F.
分类号 H01L21/3213;(IPC1-7):H01L21/302;H01L21/461 主分类号 H01L21/3213
代理机构 代理人
主权项
地址