发明名称 Ground-plane device with back oxide topography
摘要 A ground-plane SOI device including at least a gate region that is formed on a top Si-containing layer of a SOI wafer, said top Si-containing layer being formed on a non-planar buried oxide layer, wherein said non-planar buried oxide layer has a thickness beneath the gate region that is thinner than corresponding oxide layers that are formed in regions not beneath said gate region as well as a method of fabricating the same are provided.
申请公布号 US2002090768(A1) 申请公布日期 2002.07.11
申请号 US20010757317 申请日期 2001.01.09
申请人 ASSADERAGHI FARIBORZ;CHEN TZE-CHIANG;MULLER K. PAUL;NOWAK EDWARD J.;SADANA DEVENDRA K.;SHAHIDI GHAVAM G. 发明人 ASSADERAGHI FARIBORZ;CHEN TZE-CHIANG;MULLER K. PAUL;NOWAK EDWARD J.;SADANA DEVENDRA K.;SHAHIDI GHAVAM G.
分类号 H01L21/336;H01L29/786;(IPC1-7):H01L21/00 主分类号 H01L21/336
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