发明名称 Synchronization timing correcting circuit and method
摘要 Deviation amount judging means 108 compares correlation values from respective correlating devices 1051 to 1058 with one another to detect a deviation amount and a deviation direction of a frequency central value currently set from a synchronization timing at which the maximum correlation value can be obtained and outputs a window position changing signal to window moving means 107. The window moving means 107 performs change of the frequency central value of a window width on the basis of the window position changing signal from the deviation amount judging means 108. When the correlation value maximum timing moves from the central frequency due to an AFC error, the position of the window itself is moved corresponding to the movement of the correlation value maximum timing so that the correlation value maximum timing is prevented from deviating from the window even when the window width is made narrow.
申请公布号 US2002090923(A1) 申请公布日期 2002.07.11
申请号 US20020035192 申请日期 2002.01.04
申请人 MURAMOTO KIMIO 发明人 MURAMOTO KIMIO
分类号 H04B1/69;H04B1/707;H04B7/26;H04L7/00;(IPC1-7):H04B1/18 主分类号 H04B1/69
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