Electronic circuit for testing a memory cell in a main memory area has a comparator, an error location store, a data output and a switch controlled by a reader-mode control signal.

摘要

During a read routine at a location in a main memory area (1) a value is read out from a memory area and compared in a comparator (4) with a scheduled value from a scheduled value memory (5). By relying on a result from the comparison and on a read-mode control signal, the location is stored in an error location register (10). To test a memory area, a number of read routines are performed on the main memory area without storing the location in the error location store. A further read routine is carried out and the location is stored in the error location store depending on a result from the comparison. An Independent claim is also included for a method for testing a memory cell for a main memory area.